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March 1998
FDP4030L / FDB4030L N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process has been especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as DC/DC converters and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
Features
20 A, 30 V. RDS(ON) = 0.035 @ VGS=10 V RDS(ON) = 0.055 @ VGS=4.5V. Critical DC electrical parameters specified at elevated temperature. Rugged internal source-drain diode can eliminate the need for an external Zener diode transient suppressor. High density cell design for extremely low RDS(ON). 175C maximum junction temperature rating.
_______________________________________________________________________________
D
G
S
Absolute Maximum Ratings
Symbol Parameter
TC = 25C unless otherwise noted
FDP4030L
FDB4030L
Units
VDSS VGSS ID PD
Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed
(Note 1) (Note 1)
30 20 20 60 37.5 0.25 -65 to 175 275
V V A
Total Power Dissipation @ TC = 25C Derate above 25C
W W/C C C
TJ,TSTG TL
Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds
THERMAL CHARACTERISTICS
RJC RJA
Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient
4 62.5
C/W C/W
(c) 1998 Fairchild Semiconductor Corporation
FDP4030L Rev.B1
Electrical Characteristics (T
Symbol Parameter
C
= 25C unless otherwise noted)
Conditions
(Note 1)
Min
Typ
Max
Unit
DRAIN-SOURCE AVALANCHE RATINGS OFF CHARACTERISTICS
WDSS IAR BVDSS IDSS IGSSF IGSSR VGS(th)
Single Pulse Drain-Source Avalanche Energy
VDD = 15 V, ID = 7 A
50
mJ
Maximum Drain-Source Avalanche Current Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 A ID = 250 A, Referenced to 25oC VDS = 24 V, VGS = 0 V TJ = 125C Gate - Body Leakage, Forward Gate - Body Leakage, Reverse
(Note 1)
7 30 33 10 1 100 -100
A V mV/oC A mA nA nA
BVDSS/TJ Breakdown Voltage Temp. Coefficient
Zero Gate Voltage Drain Current
VGS = 20 V, VDS = 0 V VGS = -20 V, VDS = 0 V VDS = VGS, ID = 250 A ID = 250 A, Referenced to 25 C VGS = 10 V, ID = 10 A TJ = 125C VGS = 10 V, ID = 4.5 A
o
ON CHARACTERISTICS
Gate Threshold Voltage Gate Threshold Voltage Temp. Coefficient Static Drain-Source On-Resistance
1
1.6 -4.1 0.025 0.048 0.046
2
V mV/oC
VGS(th)/TJ
RDS(ON)
0.035 0.06 0.055
ID(on) gFS
On-State Drain Current Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
(Note 1)
VGS = 10 V, VDS = 10 V VDS = 10 V, ID = 10 A VDS = 15 V, VGS = 0 V, f = 1.0 MHz
30 11 365 210 70
A S pF pF pF
DYNAMIC CHARACTERISTICS
Ciss Coss Crss
tD(on) tr tD(off) tf Qg Qgs Qgd IS ISM VSD
SWITCHING CHARACTERISTICS
Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge
VDD = 15 V, ID = 10 A, VGS = 10 V, RGEN = 10
8 8 20 10
15 15 40 20 18
nS nS nS nS nC nC nC
VDS = 24 V ID = 10 A, VGS= 10 V
13 2 4
DRAIN-SOURCE DIODE CHARACTERISTICS
Maximum Continuos Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = 10 A
(Note 1)
20 60 1.12 1.08 1.3 1.2 TJ = 125C
A A V
Note: 1. Pulse Test: Pulse Width < 300 s, Duty Cycle < 2.0%.
FDP4030L Rev.B1
Typical Electrical Characteristics
40 I D , DRAIN-SOURCE CURRENT (A) 2.5 DRAIN-SOURCE ON-RESISTANCE
VGS = 10V
6.0V
30 R DS(ON) , NORMALIZED
2
5.0V 4.5V
VGS =4.5V 5.0V
20
1.5
5.5V
6.0V 7.0V 8.0V 10V
4.0V
10
1
3.5V
0 0 1 2 3 4 5 VDS , DRAIN-SOURCE VOLTAGE (V)
0.5 0 10 20 I D , DRAIN CURRENT (A) 30 40
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
1.8 DRAIN-SOURCE ON-RESISTANCE 1.6 1.4 1.2 1 0.8 0.6 -50
0.16
R DS(ON) , ON-RESISTANCE (OHM)
I D = 10A V GS = 10V
ID = 10A
0.12
R DS(ON) , NORMALIZED
0.08
TA = 125 C
0.04
TA = 25 C
0 2 4 6 8 10
-25
0
25
50
75
100
125
150
175
TJ , JUNCTION TEMPERATURE (C)
VGS , GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with Temperature.
Figure 4. On-Resistance Variation with Gate-to-Source Voltage.
15
15
VDS = 10V
I D , DRAIN CURRENT (A) 12
TJ = -55C
25C 125C
IS , REVERSE DRAIN CURRENT (A)
VGS =0V
1
TJ = 125C 25C -55C
9
0.1
6
0.01
3
0.001
0 1 1.5 2 2.5 3 3.5 4 4.5 5 VGS , GATE TO SOURCE VOLTAGE (V)
0.0001 0 0.2 0.4 0.6 0.8 1 1.2 1.4 VSD , BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6 . Body Diode Forward Voltage Variation with Source Current and Temperature.
FDP4030L Rev.B1
Typical Electrical Characteristics (continued)
15 VGS , GATE-SOURCE VOLTAGE (V)
ID = 10A
12
VDS = 6V 12V 24V
1000
CAPACITANCE (pF)
400
Ciss Coss
9
200
6
100
3
40 0.1
f = 1 MHz VGS = 0V
0.3 1 4
Crss
0 0 4 8 12 16 20 Q g , GATE CHARGE (nC)
10
30
VDS , DRAIN TO SOURCE VOLTAGE (V)
EFFECTIVE
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
100 50 I D , DRAIN CURRENT (A) 20 10 5 2 1 0.5 0.5
R
D S(O N)
1000
Lim
it
10 10 s 0 s
POWER (W)
800
1m s
10 ms 10 0m DC s
SINGLE PULSE R JC = 4C/W TC = 25C
600
400
VGS = 10V SINGLE PULSE RJC = 4 o C/W TC = 25 C
1 3 5
200
0 0.0001
0.001
0.01
0.1
1
10
10
20
30
50
SINGLE PULSE TIME (SEC)
NORMALIZED
V DS , DRAIN-SOURCE VOLTAGE (V))
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power Dissipation.
1
r(t), TRANSIENT THERMAL RESISTANCE
0.5
D = 0.5
R JC (t) = r(t) * RJC R JC = 4.0 C/W
0.2
0.2
0.1 0.05 Single Pulse
P(pk)
t1
0.1
t2
TJ - TC = P * RJC (t) Duty Cycle, D = t1 /t2
0.001 0.01 t 1 ,TIME (sec) 0.1 1 10
0.05 0.0001
Figure 11. Transient Thermal Response Curve.
FDP4030L Rev.B1
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM BottomlessTM CoolFETTM CROSSVOLTTM DenseTrenchTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACTTM FACT Quiet SeriesTM
DISCLAIMER
FAST (R) FASTrTM FRFETTM GlobalOptoisolatorTM GTOTM HiSeCTM ISOPLANARTM LittleFETTM MicroFETTM MicroPakTM MICROWIRETM
OPTOLOGICTM OPTOPLANARTM PACMANTM POPTM Power247TM PowerTrench (R) QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM SILENT SWITCHER (R)
SMART STARTTM STAR*POWERTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM TruTranslationTM UHCTM UltraFET (R)
VCXTM
STAR*POWER is used under license
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. H4

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